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50 MHz to 2 GHz Quadrature Demodulator ADL5387
FEATURES
Operating RF frequency 50 MHz to 2 GHz LO input at 2 x fLO 100 MHz to 4 GHz Input IP3: 31 dBm @ 900 MHz Input IP2: 62 dBm @ 900 MHz Input P1dB: 13 dBm @ 900 MHz Noise figure (NF) 12.0 dB @ 140 MHz 14.7 dB @ 900 MHz Voltage conversion gain > 4 dB Quadrature demodulation accuracy Phase accuracy ~0.4 Amplitude balance ~0.05 dB Demodulation bandwidth ~240 MHz Baseband I/Q drive 2 V p-p into 200 Single 5 V supply
FUNCTIONAL BLOCK DIAGRAM
24 1 2 3 4 5 6 23 22 21 20 19 CMRF CMRF RFIP RFIN CMRF VPX VPA VPB 18 COM BIAS VPL VPL VPL CML 7 LOIP LOIN CML 8 9 10 CML 11 DIVIDE-BY-2 PHASE SPLITTER VPB 17 QHI 16 QLO 15 IHI 14 ILO 13 12
06764-001
COM
Figure 1.
APPLICATIONS
QAM/QPSK RF/IF demodulators W-CDMA/CDMA/CDMA2000/GSM Microwave point-to-(multi)point radios Broadband wireless and WiMAX Broadband CATVs
GENERAL DESCRIPTION
The ADL5387 is a broadband quadrature I/Q demodulator that covers an RF/IF input frequency range from 50 MHz to 2 GHz. With a NF = 13.2 dB, IP1dB = 12.7 dBm, and IIP3 = 32 dBm @ 450 MHz, the ADL5387 demodulator offers outstanding dynamic range suitable for the demanding infrastructure direct-conversion requirements. The differential RF/IF inputs provide a wellbehaved broadband input impedance of 50 and are best driven from a 1:1 balun for optimum performance. Ultrabroadband operation is achieved with a divide-by-2 method for local oscillator (LO) quadrature generation. Over a wide range of LO levels, excellent demodulation accuracy is achieved with amplitude and phase balances ~0.05 dB and ~0.4, respectively. The demodulated in-phase (I) and quadrature (Q) differential outputs are fully buffered and provide a voltage conversion gain of >4 dB. The buffered baseband outputs are capable of driving a 2 V p-p differential signal into 200 .
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
The fully balanced design minimizes effects from second-order distortion. The leakage from the LO port to the RF port is <-70 dBc. Differential dc-offsets at the I and Q outputs are <10 mV. Both of these factors contribute to the excellent IIP2 specifications > 60 dBm. The ADL5387 operates off a single 4.75 V to 5.25 V supply. The supply current is adjustable with an external resistor from the BIAS pin to ground. The ADL5387 is fabricated using the Analog Devices, Inc. advanced silicon-germanium bipolar process and is available in a 24-lead exposed paddle LFCSP.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2007 Analog Devices, Inc. All rights reserved.
ADL5387 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 ESD Caution.................................................................................. 5 Pin Configuration and Function Descriptions............................. 6 Typical Performance Characteristics ............................................. 7 Distributions for fRF = 140 MHz ............................................... 10 Distributions for fRF = 450 MHz ............................................... 11 Distributions for fRF = 900 MHz ............................................... 12 Distributions for fRF = 1900 MHz............................................. 13 Circuit Description......................................................................... 14 LO Interface................................................................................. 14 V-to-I Converter......................................................................... 14 Mixers .......................................................................................... 14 Emitter Follower Buffers ........................................................... 14 Bias Circuit.................................................................................. 14 Applications..................................................................................... 15 Basic Connections...................................................................... 15 Power Supply............................................................................... 15 Local Oscillator (LO) Input ...................................................... 15 RF Input....................................................................................... 16 Baseband Outputs ...................................................................... 16 Error Vector Magnitude (EVM) Performance ....................... 17 Low IF Image Rejection............................................................. 18 Example Baseband Interface..................................................... 18 Characterization Setups................................................................. 21 Evaluation Board ............................................................................ 23 Outline Dimensions ....................................................................... 26 Ordering Guide .......................................................................... 26
REVISION HISTORY
10/07--Revision 0: Initial Version
Rev. 0 | Page 2 of 28
ADL5387 SPECIFICATIONS
VS = 5 V, TA = 25C, fRF = 900 MHz, fIF = 4.5 MHz, PLO = 0 dBm, BIAS pin open, ZO = 50 , unless otherwise noted, baseband outputs differentially loaded with 450 . Table 1.
Parameter OPERATING CONDITIONS LO Frequency Range RF Frequency Range LO INPUT Input Return Loss LO Input Level I/Q BASEBAND OUTPUTS Voltage Conversion Gain Condition External input = 2xLO frequency LOIP, LOIN AC-coupled into LOIP with LOIN bypassed, measured at 2 GHz -6 QHI, QLO, IHI, ILO 450 differential load on I and Q outputs (@ 900 MHz) 200 differential load on I and Q outputs (@ 900 MHz) 1 V p-p signal 3 dB bandwidth @ 900 MHz 0 dBm LO input -10 0 4.3 3.2 240 0.4 0.1 5 VPOS - 2.8 40 2 12 4.75 BIAS pin open RBIAS = 4 k RFIP, RFIN 180 157 4.7 13 67 31 -100 -95 0.05 0.2 -39 12.0 14.4 5.25 +6 dB dBm dB dB MHz Degrees dB mV V MHz V p-p mA V mA mA dB dBm dBm dBm dBm dBc dB Degrees dBm dB dB Min 0.1 0.05 Typ Max 4 2 Unit GHz GHz
Demodulation Bandwidth Quadrature Phase Error I/Q Amplitude Imbalance Output DC Offset (Differential) Output Common-Mode 0.1 dB Gain Flatness Output Swing Peak Output Current POWER SUPPLIES Voltage Current DYNAMIC PERFORMANCE @ RF = 140 MHz Conversion Gain Input P1dB (IP1dB) Second-Order Input Intercept (IIP2) Third-Order Input Intercept (IIP3) LO to RF RF to LO I/Q Magnitude Imbalance I/Q Phase Imbalance LO to I/Q Noise Figure Noise Figure under Blocking Conditions
Differential 200 load Each pin VPA, VPL, VPB, VPX
-5 dBm each input tone -5 dBm each input tone RFIN, RFIP terminated in 50 , 1xLO appearing at the RF port LOIN, LOIP terminated in 50
RFIN, RFIP terminated in 50 , 1xLO appearing at the BB port With a -5 dBm interferer 5 MHz away
Rev. 0 | Page 3 of 28
ADL5387
Parameter DYNAMIC PERFORMANCE @ RF = 450 MHz Conversion Gain Input P1dB (IP1dB) Second-Order Input Intercept (IIP2) Third-Order Input Intercept (IIP3) LO to RF RF to LO I/Q Magnitude Imbalance I/Q Phase Imbalance LO to I/Q Noise Figure DYNAMIC PERFORMANCE @ RF = 900 MHz Conversion Gain Input P1dB (IP1dB) Second-Order Input Intercept (IIP2) Third-Order Input Intercept (IIP3) LO to RF RF to LO I/Q Magnitude Imbalance I/Q Phase Imbalance LO to I/Q Noise Figure Noise Figure under Blocking Conditions DYNAMIC PERFORMANCE @ RF = 1900 MHz Condition Min Typ Max Unit
-5 dBm each input tone -5 dBm each input tone RFIN, RFIP terminated in 50 , 1xLO appearing at the RF port LOIN, LOIP terminated in 50
4.4 12.7 69.2 32.8 -87 -90 0.05 0.6 -38 13.2 4.3 12.8 61.7 31.2 -79 -88 0.05 0.2 -41 14.7 15.8
dB dBm dBm dBm dBm dBc dB Degrees dBm dB dB dBm dBm dBm dBm dBc dB Degrees dBm dB dB
RFIN, RFIP terminated in 50 , 1xLO appearing at the BB port
-5 dBm each input tone -5 dBm each input tone RFIN, RFIP terminated in 50 , 1xLO appearing at the RF port LOIN, LOIP terminated in 50
RFIN, RFIP terminated in 50 , 1XLO appearing at the BB port With a -5 dBm interferer 5 MHz away
Conversion Gain Input P1dB (IP1dB) Second-Order Input Intercept (IIP2) Third-Order Input Intercept (IIP3) LO to RF RF to LO I/Q Magnitude Imbalance I/Q Phase Imbalance LO to I/Q Noise Figure Noise Figure under Blocking Conditions
-5 dBm each input tone -5 dBm each input tone RFIN, RFIP terminated in 50 , 1xLO appearing at the RF port LOIN, LOIP terminated in 50
3.8 12.8 59.8 27.4 -75 -70 0.05 0.3 -43 16.5 18.7
dB dBm dBm dBm dBm dBc dB Degrees dBm dB dB
RFIN, RFIP terminated in 50 , 1xLO appearing at the BB port With a -5 dBm interferer 5 MHz away
Rev. 0 | Page 4 of 28
ADL5387 ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Supply Voltage VPOS1, VPOS2, VPOS3 LO Input Power RF/IF Input Power Internal Maximum Power Dissipation JA Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Rating 5.5 V 13 dBm (re: 50 ) 15 dBm (re: 50 ) 1100 mW 54C/W 150C -40C to +85C -65C to +125C
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Rev. 0 | Page 5 of 28
ADL5387 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
24 1 2 3 4 5 6 23 22 21 20 19 CMRF CMRF RFIP RFIN CMRF VPX VPA VPB 18 COM BIAS VPL VPL VPL CML 7 LOIP LOIN CML 8 9 10 CML 11 VPB 17 QHI 16 QLO 15 IHI 14 ILO 13 12
06764-002
ADL5387
TOP VIEW (Not to Scale)
COM
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. 1, 4 to 6, 17 to 19 2, 7, 10 to 12, 20, 23, 24 3 8, 9 Mnemonic VPA, VPL, VPB, VPX COM, CML, CMRF BIAS LOIP, LOIN Description Supply. Positive supply for LO, IF, biasing and baseband sections, respectively. These pins should be decoupled to board ground using appropriate sized capacitors. Ground. Connect to a low impedance ground plane. Bias Control. A resistor can be connected between BIAS and COM to reduce the mixer core current. The default setting for this pin is open. Local Oscillator. External LO input is at 2xLO frequency. A single-ended LO at 0 dBm can be applied through a 1000 pF capacitor to LOIP. LOIN should be ac-grounded, also using a 1000 pF. These inputs can also be driven differentially through a balun (recommended balun is M/A-COM ETC1-1-13). I-Channel and Q-Channel Mixer Baseband Outputs. These outputs have a 50 differential output impedance (25 per pin). The bias level on these pins is equal to VPOS - 2.8 V. Each output pair can swing 2 V p-p (differential) into a load of 200 . Output 3 dB bandwidth is 240 MHz. RF Input. A single-ended 50 signal can be applied to the RF inputs through a 1:1 balun (recommended balun is M/A-COM ETC1-1-13). Ground-referenced inductors must also be connected to RFIP and RFIN (recommended values = 120 nH). Exposed Paddle. Connect to a low impedance ground plane
13 to 16
ILO, IHI, QLO, QHI
21, 22
RFIN, RFIP
EP
Rev. 0 | Page 6 of 28
ADL5387 TYPICAL PERFORMANCE CHARACTERISTICS
VS = 5 V, TA = 25C, LO drive level = 0 dBm, RBIAS = open, unless otherwise noted.
20 TA = -40C TA = +25C TA = +85C 5 NORMALIZED TO 1MHz INPUT P1dB 0 -5 -10 -15 -20 -25 0 -30
GAIN (dB), IP1dB (dBm)
15
BB RESPONSE (dB)
06764-003
10 GAIN 5
0
200
400
600
800
1000 1200 1400 1600 1800 2000
1
10
100
1000
RF FREQUENCY (MHz)
BB FREQUENCY (MHz)
Figure 3. Conversion Gain and Input 1 dB Compression Point (IP1dB) vs. RF Frequency
80 70 60
IIP2, IIP3 (dBm)
Figure 6. Normalized I/Q Baseband Frequency Response
19
I CHANNEL Q CHANNEL
TA = +85C TA = +25C TA = -40C
17
TA = -40C TA = +25C TA = +85C
NOISE FIGURE (dB)
15
50 40 30 20 10
INPUT IP2
13
11
INPUT IP3 (I AND Q CHANNELS)
06764-004
9
0
200
400
600
800
1000 1200 1400 1600 1800 2000
0
200
400
600
800
1000 1200 1400 1600 1800 2000
RF FREQUENCY (MHz)
RF FREQUENCY (MHz)
Figure 4. Input Third-Order Intercept (IIP3) and Input Second-Order Intercept Point (IIP2) vs. RF Frequency
2.0 1.5 MAGNITUDE ERROR (dB) 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 TA = -40C TA = +25C TA = +85C 4 QUADRATURE PHASE ERROR (Degrees) 3 2 1 0 -1 -2 -3 -4
Figure 7. Noise Figure vs. RF Frequency
TA = -40C TA = +25C TA = +85C
06764-005
0
200
400
600
800
1000 1200 1400 1600 1800 2000
0
200
400
600
800
1000 1200 1400 1600 1800 2000
RF FREQUENCY (MHz)
RF FREQUENCY (MHz)
Figure 5. I/Q Gain Mismatch vs. RF Frequency
Figure 8. I/Q Quadrature Phase Error vs. RF Frequency
Rev. 0 | Page 7 of 28
06764-008
06764-007
7
06764-006
ADL5387
INPUT IP2, Q CHANNEL
GAIN (dB), INPUT P1dB (dBm), NOISE FIGURE (dB)
GAIN (dB), INPUT P1dB (dBm), NOISE FIGURE (dB)
20
80
20 INPUT IP2, I CHANNEL NOISE FIGURE
80
15 INPUT IP2, I CHANNEL INPUT P1dB 10 NOISE FIGURE GAIN 5
65
15
65
INPUT IP2, Q CHANNEL 10
INPUT P1dB 50
50
GAIN 5 35
35
INPUT IP3
06764-009
INPUT IP3 -5 -4 -3 -2 -1 0 1 2 3 4 5 6
06764-012
0 -6
-5
-4
-3
-2
-1
0
1
2
3
4
5
6
20
0 -6
20
LO LEVEL (dBm)
LO LEVEL (dBm)
Figure 9. Conversion Gain, Noise Figure, IIP3, IIP2, and IP1dB vs. LO Level, fRF = 140 MHz
32 TA = -40C TA = +25C TA = +85C 195
Figure 12. Conversion Gain, Noise Figure, IIP3, IIP2, and IP1dB vs. LO Level, fRF = 900 MHz
32 TA = -40C TA = +25C TA = +85C INPUT IP3 24
IIP3 (dBm) AND NOISE FIGURE (dB)
28
185
IIP3 (dBm) AND NOISE FIGURE (dB)
28
24
INPUT IP3 SUPPLY CURRENT
175
20
SUPPLY CURRENT (mA)
165
20 NOISE FIGURE 16
16
NOISE FIGURE
155
12
145
12
06764-010
1
10 RBIAS (k)
1
10 RBIAS (k)
100
Figure 10. Noise Figure, IIP3, and Supply Current vs. RBIAS, fRF = 140 MHz
25
80 70 60
Figure 13. IIP3 and Noise Figure vs. RBIAS, fRF = 900 MHz
20
NOISE FIGURE (dB)
RBIAS = 100k 15
GAIN (dB), IP1dB, IIP2, I AND Q CHANNELS (dBm)
RBIAS = 10k
140MHz: GAIN 50 40 30 20 10 0 140MHz: IP1dB 140MHz: IIP2, I CHANNEL 140MHz: IIP2, Q CHANNEL 450MHz: GAIN 450MHz: IP1dB 450MHz: IIP2, I CHANNEL 450MHz: IIP2, Q CHANNEL
10
RBIAS = 4k RBIAS = 1.4k
5
06764-011
-25
-20
-15
-10
-5
0
5
1
10 RBIAS (k)
100
RF BLOCKER INPUT POWER (dBm)
Figure 11. Noise Figure vs. Input Blocker Level, fRF = 900 MHz (RF Blocker 5 MHz Offset)
Figure 14. Conversion Gain, IP1dB, IIP2 I Channel, and IIP2 Q Channel vs. RBIAS
Rev. 0 | Page 8 of 28
06764-014
0 -30
06764-013
8
135 100
8
INPUT IP2, INPUT IP3 (dBm)
INPUT IP2, INPUT IP3 (dBm)
ADL5387
35 80 -20
30
IIP3
INPUT IP2, I CHANNEL
75
INPUT IP2, I AND Q CHANNELS (dBm)
-30 -40
LO LEAKAGE (dBm)
IP1dB, IIP3 (dBm)
25
70
-50 -60 -70 -80 -90 2xLO 1xLO
20
INPUT IP2, Q CHANNEL
65
15
60
10
06764-015
0
5
10
15
20
25
30
35
40
45
0
200
400
600
800
1000 1200 1400 1600 1800 2000
BB FREQUENCY (MHz)
INTERNAL 1xLO FREQUENCY (MHz)
Figure 15. IIIP3, IIP2, IP1dB vs. Baseband Frequency
0 -10 -40
FEEDTHROUGH (dBm)
Figure 18. LO-to-RF Leakage vs. Internal 1xLO Frequency
-20
-20 -30 -40 -50 -60 -70 -80 -120 2xLO (EXTERNAL) -100 1xLO (INTERNAL)
LEAKAGE (dBc)
-60
-80
06764-016
0
200
400
600
800
1000 1200 1400 1600 1800 2000
0
200
400
600
800
1000 1200 1400 1600 1800 2000
INTERNAL 1xLO FREQUENCY (MHz)
RF FREQUENCY (MHz)
Figure 16. LO-to-BB Feedthrough vs. 1xLO Frequency (Internal LO Frequency)
0 0
Figure 19. RF-to-LO Leakage vs. RF Frequency
-5
RETURN LOSS (dB) RETURN LOSS (dB)
-5
-10
-10
-15
-15
-20
-20
-25
06764-017
0
200
400
600
800
1000 1200 1400 1600 1800 2000
0
500
1000
1500
2000
2500
3000
3500
4000
RF FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 17. RF Port Return Loss vs. RF Frequency, Measured on Characterization Board through ETC1-1-13 Balun with 120 nH Bias Inductors
Figure 20. Single-Ended LO Port Return Loss vs. LO Frequency, LOIN AC-Coupled to Ground
Rev. 0 | Page 9 of 28
06764-020
-25
-30
06764-019
06764-018
5
TA = -40C TA = +25C TA = +85C
IP1dB
55
50 50
-100
ADL5387
DISTRIBUTIONS FOR fRF = 140 MHz
100 TA = -40C TA = +25C TA = +85C 100 TA = -40C TA = +25C TA = +85C I CHANNEL Q CHANNEL
80 PERCENTAGE (%)
80 PERCENTAGE (%)
06764-021
60
60
40
40
20
20
29
30
31
32
33
65 INPUT IP2 (dBm)
70
75
INPUT IP3 (dBm)
Figure 21. IIP3 Distributions
100 100
Figure 24. IIP2 Distributions for I Channel and Q Channel
80 PERCENTAGE (%)
TA = -40C TA = +25C TA = +85C
80 PERCENTAGE (%)
TA = -40C TA = +25C TA = +85C
60
60
40
40
20
20
06764-022
11
12
13
14
15
11.0
11.5
12.0
12.5
13.0
13.5
INPUT P1dB (dBm)
NOISE FIGURE (dB)
Figure 22. IP1dB Distributions
100 100
Figure 25. Noise Figure Distributions
80
PERCENTAGE (%)
TA = -40C TA = +25C TA = +85C
80
PERCENTAGE (%)
TA = -40C TA = +25C TA = +85C
60
60
40
40
20
20
06764-023
-0.1
0 I/Q GAIN MISMATCH (dB)
0.1
0.2
-0.5
0
0.5
1.0
QUADRATURE PHASE ERROR (Degrees)
Figure 23. I/Q Gain Mismatch Distributions
Figure 26. I/Q Quadrature Error Distributions
Rev. 0 | Page 10 of 28
06764-026
0 -0.2
0 -1.0
06764-025
0 10
0 10.5
06764-024
0 28
0 60
ADL5387
DISTRIBUTIONS FOR fRF = 450 MHz
100 TA = -40C TA = +25C TA = +85C 100 TA = -40C TA = +25C TA = +85C I CHANNEL Q CHANNEL
80 PERCENTAGE (%)
80 PERCENTAGE (%)
06764-027
60
60
40
40
20
20
31
32
33
34
35
65 INPUT IP2 (dBm)
70
75
INPUT IP3 (dBm)
Figure 27. IIP3 Distributions
100 100
Figure 30. IIP2 Distributions for I Channel and Q Channel
80 PERCENTAGE (%)
TA = -40C TA = +25C TA = +85C
80 PERCENTAGE (%)
TA = -40C TA = +25C TA = +85C
60
60
40
40
20
20
06764-028
11
12
13
14
15
12.5
13.0
13.5
14.0
14.5
15.0
INPUT P1dB (dBm)
NOISE FIGURE (dB)
Figure 28. IP1dB Distributions
100 100
Figure 31. Noise Figure Distributions
80
PERCENTAGE (%)
TA = -40C TA = +25C TA = +85C
80
PERCENTAGE (%)
TA = -40C TA = +25C TA = +85C
60
60
40
40
20
20
06764-029
-0.1
0 I/Q GAIN MISMATCH (dB)
0.1
0.2
-0.5
0
0.5
1.0
QUADRATURE PHASE ERROR (Degrees)
Figure 29. I/Q Gain Mismatch Distributions
Figure 32. I/Q Quadrature Error Distributions
Rev. 0 | Page 11 of 28
06764-032
0 -0.2
0 -1.0
06764-031
0 10
0 12.0
06764-030
0 30
0 60
ADL5387
DISTRIBUTIONS FOR fRF = 900 MHz
100 TA = -40C TA = +25C TA = +85C 100 TA = -40C TA = +25C TA = +85C I CHANNEL Q CHANNEL
80 PERCENTAGE (%)
80 PERCENTAGE (%)
06764-033
60
60
40
40
20
20
31
32
33
34
35
60
65 INPUT IP2 (dBm)
70
75
INPUT IP3 (dBm)
Figure 33. IIP3 Distributions
100 100
Figure 36. IIP2 Distributions for I Channel and Q Channel
80 PERCENTAGE (%)
TA = -40C TA = +25C TA = +85C
80 PERCENTAGE (%)
TA = -40C TA = +25C TA = +85C
60
60
40
40
20
20
06764-034
11
12
13
14
15
13.5
14.0
14.5
15.0
15.5
16.0
INPUT P1dB (dBm)
NOISE FIGURE (dB)
Figure 34. IP1dB Distributions
100 100
Figure 37. Noise Figure Distributions
80
PERCENTAGE (%)
TA = -40C TA = +25C TA = +85C
80
PERCENTAGE (%)
TA = -40C TA = +25C TA = +85C
60
60
40
40
20
20
06764-035
-0.1
0 I/Q GAIN MISMATCH (dB)
0.1
0.2
-0.5
0
0.5
1.0
QUADRATURE PHASE ERROR (Degrees)
Figure 35. I/Q Gain Mismatch Distributions
Figure 38. I/Q Quadrature Error Distributions
Rev. 0 | Page 12 of 28
06764-038
0 -0.2
0 -1.0
06764-037
0 10
0 13.0
06764-036
0 30
0 55
ADL5387
DISTRIBUTIONS FOR fRF = 1900 MHz
100 TA = -40C TA = +25C TA = +85C 100
80 PERCENTAGE (%)
80 PERCENTAGE (%)
60
60
40
40 TA = -40C TA = +25C TA = +85C I CHANNEL Q CHANNEL
20
20
06764-039
27
28
29
30
31
54
56
58
60
62
64
66
68
INPUT IP3 (dBm)
INPUT IP2 (dBm)
Figure 39. IIP3 Distributions
100 100
Figure 42. IIP2 Distributions for I Channel and Q Channel
80 PERCENTAGE (%)
TA = -40C TA = +25C TA = +85C
80 PERCENTAGE (%)
TA = -40C TA = +25C TA = +85C
60
60
40
40
20
20
06764-040
11
12
13
14
15
15.5
16.0
16.5
17.0
17.5
18.0
INPUT P1dB (dBm)
NOISE FIGURE (dB)
Figure 40. IP1dB Distributions
100 100
Figure 43. Noise Figure Distributions
80
PERCENTAGE (%)
TA = -40C TA = +25C TA = +85C
80
PERCENTAGE (%)
TA = -40C TA = +25C TA = +85C
60
60
40
40
20
20
06764-041
-0.1
0 I/Q GAIN MISMATCH (dB)
0.1
0.2
-0.5
0
0.5
1.0
QUADRATURE PHASE ERROR (Degrees)
Figure 41. I/Q Gain Mismatch Distributions
Figure 44. I/Q Quadrature Error Distributions
Rev. 0 | Page 13 of 28
06764-044
0 -0.2
0 -1.0
06764-043
0 10
0 15.0
06764-042
0 26
0 52
ADL5387 CIRCUIT DESCRIPTION
The ADL5387 can be divided into five sections: the local oscillator (LO) interface, the RF voltage-to-current (V-to-I) converter, the mixers, the differential emitter follower outputs, and the bias circuit. A detailed block diagram of the device is shown in Figure 45.
BIAS
V-TO-I CONVERTER
The differential RF input signal is applied to a resistively degenerated common base stage, which converts the differential input voltage to output currents. The output currents then modulate the two half-frequency LO carriers in the mixer stage.
MIXERS
IHI
ILO
LOIP RFIP RFIN DIVIDE-BY-TWO QUADRATURE PHASE SPLITTER LOIN
The ADL5387 has two double-balanced mixers: one for the in-phase channel (I channel) and one for the quadrature channel (Q channel). These mixers are based on the Gilbert cell design of four cross-connected transistors. The output currents from the two mixers are summed together in the resistive loads that then feed into the subsequent emitter follower buffers.
EMITTER FOLLOWER BUFFERS
The output emitter followers drive the differential I and Q signals off-chip. The output impedance is set by on-chip 25 series resistors that yield a 50 differential output impedance for each baseband port. The fixed output impedance forms a voltage divider with the load impedance that reduces the effective gain. For example, a 500 differential load has 1 dB lower effective gain than a high (10 k) differential load impedance.
QHI
QLO
Figure 45. Block Diagram
06764-045
The LO interface generates two LO signals at 90 of phase difference to drive two mixers in quadrature. RF signals are converted into currents by the V-to-I converters that feed into the two mixers. The differential I and Q outputs of the mixers are buffered via emitter followers. Reference currents to each section are generated by the bias circuit. A detailed description of each section follows.
BIAS CIRCUIT
A band gap reference circuit generates the proportional-toabsolute temperature (PTAT) as well as temperature-independent reference currents used by different sections. The mixer current can be reduced via an external resistor between the BIAS pin and ground. When the BIAS pin is open, the mixer runs at maximum current and hence the greatest dynamic range. The mixer current can be reduced by placing a resistance to ground; therefore, reducing overall power consumption, noise figure, and IIP3. The effect on each of these parameters is shown in Figure 10, Figure 13, and Figure 14.
LO INTERFACE
The LO interface consists of a buffer amplifier followed by a frequency divider that generate two carriers at half the input frequency and in quadrature with each other. Each carrier is then amplified and amplitude-limited to drive the doublebalanced mixers.
Rev. 0 | Page 14 of 28
ADL5387 APPLICATIONS INFORMATION
BASIC CONNECTIONS
Figure 47 shows the basic connections schematic for the ADL5387.
LO INPUT 1000pF
9 8
LOIP
POWER SUPPLY
The nominal voltage supply for the ADL5387 is 5 V and is applied to the VPA, VPB, VPL, and VPX pins. Ground should be connected to the COM, CML, and CMRF pins. Each of the supply pins should be decoupled using two capacitors; recommended capacitor values are 100 pF and 0.1 F.
1000pF
LOIN
06764-047
Figure 46. Single-Ended LO Drive
LOCAL OSCILLATOR (LO) INPUT
The LO port is driven in a single-ended manner. The LO signal must be ac-coupled via a 1000 pF capacitor directly into LOIP, and LOIN is ac-coupled to ground also using a 1000 pF capacitor. The LO port is designed for a broadband 50 match and therefore exhibits excellent return loss from 100 MHz to 4 GHz. The LO return loss can be seen in Figure 20. Figure 46 shows the LO input configuration.
The recommended LO drive level is between -6 dBm and +6 dBm. The LO frequency at the input to the device should be twice that of the desired LO frequency at the mixer core. The applied LO frequency range is between 100 MHz and 4 GHz.
RFC
ETC1-1-13
120nH
1000pF 1000pF
120nH
VPOS
24
23
22
21
20
19
RFIN
RFIP
CMRF
CMRF
CMRF
VPX
1 VPA 0.1F 100pF
VPB 18 100pF VPB 17 QHI 16 QHI QLO IHI ILO
VPOS 0.1F
2 COM 3 BIAS 4 VPL VPOS 0.1F 100pF 5 VPL
ADL5387
QLO 15 IHI 14
LOIN
LOIP
7
8
9
10
11
12
1000pF 1000pF LO
06764-046
Figure 47. Basic Connections Schematic for ADL5387
Rev. 0 | Page 15 of 28
COM
CML
CML
CML
6 VPL
ILO 13
ADL5387
RF INPUT
The RF inputs have a differential input impedance of approximately 50 . For optimum performance, the RF port should be driven differentially through a balun. The recommended balun is M/A-COM ETC1-1-13. The RF inputs to the device should be ac-coupled with 1000 pF capacitors. Ground-referenced choke inductors must also be connected to RFIP and RFIN (recommended value = 120 nH, Coilcraft 0402CS-R12XJL) for appropriate biasing. Several important aspects must be taken into account when selecting an appropriate choke inductor for this application. First, the inductor must be able to handle the approximately 40 mA of standing dc current being delivered from each of the RF input pins (RFIP, RFIN). (The suggested 0402 inductor has a 50 mA current rating). The purpose of the choke inductors is to provide a very low resistance dc path to ground and high ac impedance at the RF frequency so as not to affect the RF input impedance. A choke inductor that has a selfresonant frequency greater than the RF input frequency ensures that the choke is still looking inductive and therefore has a more predictable ac impedance (jL) at the RF frequency. Figure 48 shows the RF input configuration.
120nH
21 RFIN
The differential RF port return loss has been characterized as shown in Figure 49.
-10 -12 -14 -16 S(1, 1) (dB) -18 -20 -22 -24 -26
06764-049
-28
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
FREQUENCY (GHz)
Figure 49. Differential RF Port Return Loss
BASEBAND OUTPUTS
The baseband outputs QHI, QLO, IHI, and ILO are fixed impedance ports. Each baseband pair has a 50 differential output impedance. The outputs can be presented with differential loads as low as 200 (with some degradation in linearity and gain) or high impedance differential loads (500 or greater impedance yields the same excellent linearity) that is typical of an ADC. The TCM9-1 9:1 balun converts the differential IF output to single-ended. When loaded with 50 , this balun presents a 450 load to the device. The typical maximum linear voltage swing for these outputs is 2 V p-p differential. The bias level on these pins is equal to VPOS - 2.8 V. The output 3 dB bandwidth is 240 MHz. Figure 50 shows the baseband output configuration.
QHI 16 QHI
1000pF ETC1-1-13 1000pF
22 RFIP
RF INPUT 120nH
06764-048
Figure 48. RF Input
QLO 15
QLO
IHI 14
IHI
ILO 13
ILO
Figure 50. Baseband Output Configuration
Rev. 0 | Page 16 of 28
06764-050
ADL5387
ERROR VECTOR MAGNITUDE (EVM) PERFORMANCE
EVM is a measure used to quantify the performance of a digital radio transmitter or receiver. A signal received by a receiver would have all constellation points at the ideal locations; however, various imperfections in the implementation (such as carrier leakage, phase noise, and quadrature error) cause the actual constellation points to deviate from the ideal locations. The ADL5387 shows excellent EVM performance for various modulation schemes. Figure 51 shows typical EVM performance over input power range for a point-to-point application with 16 QAM modulation schemes and zero-IF baseband. The differential dc offsets on the ADL5387 are in the order of a few mV. However, ac coupling the baseband outputs with 10 F capacitors helps to eliminate dc offsets and enhances EVM performance. With a 10 MHz BW signal, 10 F ac coupling capacitors with the 500 differential load results in a high-pass corner frequency of ~64 Hz which absorbs an insignificant amount of modulated signal energy from the baseband signal. By using ac coupling capacitors at the baseband outputs, the dc offset effects, which can limit dynamic range at low input power levels, can be eliminated.
0 -5
Figure 52 shows the EVM performance of the ADL5387 when ac-coupled, with an IEEE 802.16e WiMAX signal.
0 -5 -10 -15
EVM (dB)
-20 -25 -30 -35 -40 -45 -40 -30 -20 -10 0 10 20
06764-052 06764-053
-50 -50
INPUT POWER (dBm)
Figure 52. RF = 750MHz MHz, IF = 0 Hz, EVM vs. Input Power for a 16 QAM 10 MHz Bandwidth Mobile WiMAX Signal (AC-Coupled Baseband Outputs)
Figure 53 exhibits the zero IF EVM performance of a WCDMA signal over a wide RF input power range.
0 -5 -10 -15
EVM (dB)
-10 -15
-20 -25 -30 -35 -40 -45 -70
EVM (dB)
-20 -25 -30 -35 -40 -45 -60 -50 -40 -30 -20 -10 0 10
06764-051
-60
-50
-40
-30
-20
-10
0
10
INPUT POWER (dBm)
-50 -70
Figure 53. RF = 1950 MHz, IF = 0 Hz, EVM vs. Input Power for a WCDMA (AC-Coupled Baseband Outputs)
INPUT POWER (dBm)
Figure 51. RF = 140 MHz, IF = 0 Hz, EVM vs. Input Power for a 16 QAM 10 Msym/s Signal (AC-Coupled Baseband Outputs)
Rev. 0 | Page 17 of 28
ADL5387
COSLOt
0
IF
IF
-IF 0 +IF -90 0 +IF
+90
LSB
LO
USB
-IF SINLOt 0 +IF
0
0
+IF
06764-054
Figure 54. Illustration of the Image Problem
LOW IF IMAGE REJECTION
The image rejection ratio is the ratio of the intermediate frequency (IF) signal level produced by the desired input frequency to that produced by the image frequency. The image rejection ratio is expressed in decibels. Appropriate image rejection is critical because the image power can be much higher than that of the desired signal, thereby plaguing the down conversion process. Figure 54 illustrates the image problem. If the upper sideband (lower sideband) is the desired band, a 90 shift to the Q channel (I channel) cancels the image at the lower sideband (upper sideband). Figure 55 shows the excellent image rejection capabilities of the ADL5387 for low IF applications, such as CDMA2000. The ADL5387 exhibits image rejection greater than 45 dB over the broad frequency range for an IF = 1.23 MHz.
0 -10 -20 -30 -40 -50 -60 -70 50
EXAMPLE BASEBAND INTERFACE
In most direct conversion receiver designs, it is desirable to select a wanted carrier within a specified band. The desired channel can be demodulated by tuning the LO to the appropriate carrier frequency. If the desired RF band contains multiple carriers of interest, the adjacent carriers would also be down converted to a lower IF frequency. These adjacent carriers can be problematic if they are large relative to the wanted carrier as they can overdrive the baseband signal detection circuitry. As a result, it is often necessary to insert a filter to provide sufficient rejection of the adjacent carriers. It is necessary to consider the overall source and load impedance presented by the ADL5387 and ADC input to design the filter network. The differential baseband output impedance of the ADL5387 is 50 . The ADL5387 is designed to drive a high impedance ADC input. It may be desirable to terminate the ADC input down to lower impedance by using a terminating resistor, such as 500 . The terminating resistor helps to better define the input impedance at the ADC input. The order and type of filter network depends on the desired high frequency rejection required, pass-band ripple, and group delay. Filter design tables provide outlines for various filter types and orders, illustrating the normalized inductor and capacitor values for a 1 Hz cutoff frequency and 1 load. After scaling the normalized prototype element values by the actual desired cut-off frequency and load impedance, the series reactance elements are halved to realize the final balanced filter network component values.
IMAGE REJECTION AT 1.23MHz (dB)
250
450
650
850
1050 1250 1450 1650 1850
RF INPUT FREQUENCY (MHz)
Figure 55. Image Rejection vs. RF Input Frequency for a CDMA2000 Signal, IF = 1.23 MHz
06764-055
Rev. 0 | Page 18 of 28
ADL5387
As an example, a second-order, Butterworth, low-pass filter design is shown in Figure 56 where the differential load impedance is 500 , and the source impedance of the ADL5387 is 50 . The normalized series inductor value for the 10-to-1, load-tosource impedance ratio is 0.074 H, and the normalized shunt capacitor is 14.814 F. For a 10.9 MHz cutoff frequency, the single-ended equivalent circuit consists of a 0.54 H series inductor followed by a 433 pF shunt capacitor. The balanced configuration is realized as the 0.54 H inductor is split in half to realize the network shown in Figure 56.
RS = 50 LN = 0.074H NORMALIZED SINGLE-ENDED CONFIGURATION RS = 0.1 RL RS = 50 VS 0.54H DENORMALIZED SINGLE-ENDED EQUIVALENT 900 800 RS = 25 2 VS
Figure 57 and Figure 58 show the measured frequency response and group delay of the filter.
10
5
MAGNITUDE RESPONSE (dB)
0
-5
-10
VS
CN
14.814F
RL= 500
-15
fC = 1Hz
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
FREQUENCY (MHz)
Figure 57. Baseband Filter Response
433pF RL= 500
fC = 10.9MHz
0.27H BALANCED CONFIGURATION
DELAY (ns)
700 600 500 400 300 200 100
433pF
RL 2 = 250 RL = 250 2
06764-056
RS = 25 2
0.27H
Figure 56. Second-Order, Butterworth, Low-Pass Filter Design Example
A complete design example is shown in Figure 59. A sixth-order Butterworth differential filter having a 1.9 MHz corner frequency interfaces the output of the ADL5387 to that of an ADC input. The 500 load resistor defines the input impedance of the ADC. The filter adheres to typical direct conversion WCDMA applications, where 1.92 MHz away from the carrier IF frequency, 1 dB of rejection is desired and 2.7 MHz away 10 dB of rejection is desired.
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
FREQUENCY (MHz)
Figure 58. Baseband Filter Group Delay
Rev. 0 | Page 19 of 28
06764-158
06764-157
-20
ADL5387
RFC ETC1-1-13
120nH
1000pF 1000pF
120nH CAC 10F
27H
27H
10H ADC INPUT
06764-159
270pF
91pF
68pF
24 CMRF 1 VPA
23 CMRF
22 RFIP
21 RFIN
20 CMRF
19 VPX VPB 18 100pF VPB 17 QHI 16 VPOS 0.1F CAC 10F
0.1F
100pF 2 COM 3 BIAS 4 VPL
27H
27H
10H
ADL5387
QLO 15 IHI 14
VPOS 0.1F 100pF
5 VPL LOIN LOIP 6 VPL
COM
CML
CML
CML
ILO 13
CAC 10F
27H
27H
10H ADC INPUT
7
8
9
10
11
12 270pF 91pF 68pF 500
1000pF LO
1000pF
CAC 10F
27H
27H
10H
Figure 59. Sixth Order Low-Pass Butterworth Baseband Filter Schematic
Rev. 0 | Page 20 of 28
500
VPOS
ADL5387 CHARACTERIZATION SETUPS
Figure 60 to Figure 62 show the general characterization bench setups used extensively for the ADL5387. The setup shown in Figure 62 was used to do the bulk of the testing and used sinusoidal signals on both the LO and RF inputs. An automated AgilentVEE program was used to control the equipment over the IEEE bus. This setup was used to measure gain, IP1dB, IIP2, IIP3, I/Q gain match, and quadrature error. The ADL5387 characterization board had a 9-to-1 impedance transformer on each of the differential baseband ports to do the differential-to-singleended conversion. The two setups shown in Figure 60 and Figure 61 were used for making NF measurements. Figure 60 shows the setup for measuring NF with no blocker signal applied while Figure 61 was used to measure NF in the presence of a blocker. For both setups, the noise was measured at a baseband frequency of 10 MHz. For the case where a blocker was applied, the output blocker was at 15 MHz baseband frequency. Note that great care must be taken when measuring NF in the presence of a blocker. The RF blocker generator must be filtered to prevent its noise (which increases with increasing generator output power) from swamping the noise contribution of the ADL5387. At least 30 dB of attention at the RF and image frequencies is desired. For example, with a 2xLO of 1848 MHz applied to the ADL5387, the internal 1xLO is 924 MHz. To obtain a 15 MHz output blocker signal, the RF blocker generator is set to 939 MHz and the filters tuned such that there is at least 30 dB of attenuation from the generator at both the desired RF frequency (934 MHz) and the image RF frequency (914 MHz). Finally, the blocker must be removed from the output (by the 10 MHz low-pass filter) to prevent the blocker from swamping the analyzer.
SNS CONTROL
RF GND VPOS CHAR BOARD HP 6235A POWER SUPPLY LO
ADL5387
Q I
R1 50
FROM SNS PORT
OUTPUT
AGILENT N8974A NOISE FIGURE ANALYZER
INPUT
6dB PAD
AGILENT 8665B SIGNAL GENERATOR IEEE
PC CONTROLLER
Figure 60. General Noise Figure Measurement Setup
Rev. 0 | Page 21 of 28
06764-057
IEEE
LOW-PASS FILTER
ADL5387
BAND-PASS TUNABLE FILTER R&S SMT03 SIGNAL GENERATOR
6dB PAD
BAND-REJECT TUNABLE FILTER
RF GND VPOS CHAR BOARD HP 6235A POWER SUPPLY LO
6dB PAD
Q
R1 50 LOW-PASS FILTER
R&S FSEA30 SPECTRUM ANALYZER
ADL5387
6dB PAD I
BAND-PASS CAVITY FILTER
HP87405 LOW NOISE PREAMP
06764-058
AGILENT 8665B SIGNAL GENERATOR
Figure 61. Measurement Setup for Noise Figure in the Presence of a Blocker
3dB PAD RF AMPLIFIER RF
IEEE
3dB PAD IN VP GND 3dB PAD AGILENT 11636A
OUT 3dB PAD
R&S SMT-06
RF
IEEE 6dB PAD
R&S SMT-06
RF
IEEE
Q 6dB PAD SWITCH MATRIX I 6dB PAD
GND
VPOS CHAR BOARD AGILENT E3631 PWER SUPPLY LO
6dB PAD
ADL5387
IEEE
AGILENT E8257D SIGNAL GENERATOR
IEEE
IEEE
PC CONTROLLER
R&S FSEA30 SPECTRUM ANALYZER
HP 8508A VECTOR VOLTMETER
Figure 62. General ADL5387 Characterization Setup
Rev. 0 | Page 22 of 28
06764-059
IEEE
RF INPUT
INPUT CHANNELS A AND B
ADL5387 EVALUATION BOARD
The ADL5387 evaluation board is available. The board can be used for single-ended or differential baseband analysis. The default configuration of the board is for single-ended baseband analysis.
T1
RFC
R8
L2
C11
C10
L1
R7
VPOS R1 C1 C2
24
23
22
21
20
19
RFIP
RFIN
CMRF
CMRF
CMRF
VPX
1 VPA
VPB 18 C8 VPB 17 QHI 16
R6 C9 R9 R14
VPOS
2 COM R2 3 BIAS 4 VPL VPOS C3 R3 C4 5 VPL
Q OUTPUT OR QHI R15 T2
ADL5387
QLO 15 C12 IHI 14 R16
LOIN
LOIP
COM
CML
CML
CML
6 VPL
ILO 13
QLO R10 R11 R4 C13 R13 R5 T3 I OUTPUT OR IHI
7
8
9
10
11
12
C5
C6 R17 LO
C7 T4
ILO R12
Figure 63. Evaluation Board Schematic
Rev. 0 | Page 23 of 28
06764-060
ADL5387
Table 4. Evaluation Board Configuration Options
Component VPOS, GND R1, R3, R6 C1, C2, C3, C4, C8, C9 C5, C6, C7, C10, C11 R4, R5, R9 to R16 Function Power Supply and Ground Vector Pins. Power Supply Decoupling. Shorts or power supply decoupling resistors. The capacitors provide the required dc coupling up to 2 GHz. AC Coupling Capacitors. These capacitors provide the required ac coupling from 50 MHz to 2 GHz. Single-Ended Baseband Output Path. This is the default configuration of the evaluation board. R14 to R16 and R4, R5, and R13 are populated for appropriate balun interface. R9, R10 and R11, R12 are not populated. Baseband outputs are taken from QHI and IHI. The user can reconfigure the board to use full differential baseband outputs. R9 to R12 provide a means to bypass the 9:1 TCM9-1 transformer to allow for differential baseband outputs. Access the differential baseband signals by populating R9 to R12 with 0 and not populating R4, R5, R13 to R16. This way the transformer does not need to be removed. The baseband outputs are taken from the SMAs of Q_HI, Q_LO, I_HI, and I_LO. Input Biasing. Inductance and resistance sets the input biasing of the common base input stage. Default value is 120 nH. IF Output Interface. TCM9-1 converts a differential high impedance IF output to a singleended output. When loaded with 50 , this balun presents a 450 load to the device. The center tap can be decoupled through a capacitor to ground. Decoupling Capacitors. C12 and C13 are the decoupling capacitors used to reject noise on the center tap of the TCM9-1. LO Input Interface. The LO is driven as a single-ended signal. Although, there is no performance change for a differential signal drive, the option is available by placing a transformer (T4, ETC1-1-13) on the LO input path. RF Input Interface. ETC1-1-13 is a 1:1 RF balun that converts the single-ended RF input to differential signal. RBIAS. Optional bias setting resistor. See the Bias Circuit section to see how to use this feature. Default Condition Not Applicable R1, R3, R6 = 0 (0805) C2, C4, C8 = 100 pF (0402) C1, C3, C9 = 0.1 F (0603) C5, C6, C10, C11 = 1000 pF (0402), C7 = Open R4, R5, R13 to R16 = 0 (0402), R9 to R12 = Open
L1, L2, R7, R8 T2, T3
L1, L2 = 120 nH (0402) R7, R8 = 0 (0402) T2, T3 = TCM9-1, 9:1 (Mini-Circuits)
C12, C13 R17
C12, C13 = 0.1 F (0402) R17 = 0 (0402)
T1 R2
T1 = ETC1-1-13, 1:1 (M/A COM) R2 = Open
Rev. 0 | Page 24 of 28
ADL5387
06764-164
Figure 64. Evaluation Board Top Layer
Figure 66. Evaluation Board Bottom Layer
06764-165
Figure 65. Evaluation Board Top Layer Silkscreen
Figure 67. Evaluation Board Bottom Layer Silkscreen
Rev. 0 | Page 25 of 28
06764-167
06764-166
ADL5387 OUTLINE DIMENSIONS
4.00 BSC SQ 0.60 MAX 0.60 MAX 0.50 BSC 0.50 0.40 0.30 1.00 0.85 0.80 12 MAX 0.80 MAX 0.65 TYP
19 18 EXPOSED PAD 24 1
PIN 1 INDICATOR *2.45 2.30 SQ 2.15
6
PIN 1 INDICATOR
TOP VIEW
3.75 BSC SQ
(BO TTOMVIEW)
13 12
7
0.23 MIN 2.50 REF
0.05 MAX 0.02 NOM 0.20 REF COPLANARITY 0.08
SEATING PLANE
0.30 0.23 0.18
*COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-2 EXCEPT FOR EXPOSED PAD DIMENSION
Figure 68. 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 4 mm x 4 mm Body, Very Thin Quad (CP-24-2) Dimensions shown in millimeters
ORDERING GUIDE
Model ADL5387ACPZ-R7 1 ADL5387ACPZ-WP1 ADL5387-EVALZ1
1
Temperature Range -40C to +85C -40C to +85C
Package Description 24-Lead LFCSP_VQ, 7" Tape and Reel 24-Lead LFCSP_VQ, Waffle Pack Evaluation Board
Package Option CP-24-2 CP-24-2
Ordering Quantity 1,500 64
Z = RoHS Compliant Part.
Rev. 0 | Page 26 of 28
ADL5387 NOTES
Rev. 0 | Page 27 of 28
ADL5387 NOTES
(c)2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06764-0-10/07(0)
Rev. 0 | Page 28 of 28

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